1. Field of the Invention
This invention relates to a pulse control apparatus for supplying machining pulses to electric disclarge machines.
2. Background of the Invention
In an electric discharge machine (EDM) a switching element supplies machining pulses to the gap formed between a machining electrode and a workpiece. This switching element is controlled by gate signals.
However, control of the pulse width of these gate signals, i.e., off-time control and on-time control, generally differs between diesinking type EDMs and wire type EDMs.
Therefore, combining circuits for diesinking type EDMs and wire type EDMs on the same hardware is not cost-effective. Such a combination also has the drawback of increasing the size of the hardware. Another drawback of combining such circuits is that any change to the assembled hardware would require changes in the printed circuit boards from the design level. This is time consuming and could take on the order of at least one month.
Similar problems are encountered if diesinking type EDMs and wire type EDMs are used in combination. Two different logic circuits (for different combinations of processing materials and conditions) would have to be designed into the hardware, and both of the logic circuits would have to be configured to enable changing from one logic circuit to the other.
For example, in FIG. 10, a circuit including an OR-gate 1 and counter 2 is used for generating an NGP (no good pulse), indicative of a bad discharge when any one of three pulses (NGiP, NGvP, or NG.tau.P) are present. for counting the NGPs, and for controlling the off-time interval according to the count value.
An NGiP pulse is generated when the lap current is higher than a specified value: an NGvP pulse is generated when the gap voltage is lower than a specified value: and an NG.tau.P pulse is generated when the time .tau..sub.w) between applying the voltage to the gap until discharge starts shorter than a specified time.
In FIG. 11, an AND-gate 3, OR-gate 4 and counter 2 are used to control the off-time interval according to a count value based on the number of NGP counts corresponding to the condition where both the NGiP and NGvP pulses are present or when an NG.tau.P pulse is generated.
FIGS. 10 and 11 show relatively simple logic circuits. However, if the logic circuit shown in FIG. 10 must be changed to that shown in FIG. 11, the printed circuit board must be redesigned, resulting in a lengthy delay. This problem will occur in either diesinking type EDMs or wire type EDMs; it will also occur when a printed circuit board used in a diesinking type EDM is used in a wire type EDM, and vice versa.